High-availability computing can avoid downtime due to inevitable data errors by using error-correcting code (ECC) memory systems. Error-correcting codes such as Hamming code or triple modular redundancy (TMR) employ redundancy to allow the most common data errors to be detected and corrected. To accommodate the redundancy, ECC memory modules typically provide nine bytes of storage (9×8=72 bits) for each eight bytes of data (64 bits) in a memory rank. Like non-ECC memory, memory can be provided in memory modules (e.g., SIMMs and DIMMs) to be installed on a baseboard. The actual error detection and correction is performed by an ECC-capable memory controller, which is typically on the baseboard. “ECC on SIMMs” (EOS) memory, which have controllers on the memory modules, can be used for systems without built-in ECC support.